1. Field of the Invention
The present invention relates to a semiconductor device including a TCAM (Ternary Content Addressable Memory) having a storage element formed with a DRAM (Dynamic Random Access Memory).
2. Description of the Background Art
As a memory storing information in a TCAM, SRAMs (Static Random Access Memory) are generally employed and available as a product. When an SRAM is employed, a total of 16 transistors, i.e. 12 transistors corresponding to two CMOS-SRAMs and 4 search transistors for a search operation, is required per cell. Therefore, the cells occupy a large area to become a bottleneck in reducing the size of the apparatus. In view of the foregoing, an approach of forming the storage memory unit with a DRAM has been proposed. (For example, refer to U.S. Pat. Nos. 6,262,907B1, 6,320,777B1 and 6,529,397B2.
In general, the cell of a TCAM is composed of a retain transistor unit identified as a storage memory, and a search transistor unit. When a DRAM is employed for the retain transistor unit, two DRAM memory transistors, and two capacitors connected to the source/drain region of that memory transistor are arranged at the retain transistor unit. At the search transistor unit, a first search transistor having its gate connected to the storage node of the two capacitors, and driven by the node, and a second search transistor having its source/drain region connected with the source/drain region of the first search transistor are arranged.
A capacitor stores digital information by retaining charge. A TCAM memory cell is arranged at a position where a word line WL and a match line ML cross a bit line open BL, a search line SL, and a complementary search line/SL. The TCAM memory cells are arranged in a matrix to carry out charge processing (for example, refer to U.S. Pat. No. 6,262,907B1).
In a TCAM, the three combinations of (High, Low), (Low, High), (Low, Low) of the storage node potentials of the two capacitors are set to correspond to the ternary. Between match line ML and the ground potential are arranged two rows of search transistors, i.e. first and second search transistors corresponding to the two capacitors set forth above, having their source/drains connected to each other. When one of the two rows attains an ON state from the match line to the ground, the potential of match line ML is pulled to GND, otherwise, match line ML remains at the level of precharged potential. In practice, a plurality of TCAM cells are connected to one match line. In the case where the potential of the match line is not pulled out by all the cells, the search corresponds to a match. Data search is conducted readily by using a semiconductor device for searching set forth above.
The performance of such a semiconductor device with a search function is evaluated based on the sps (search per second) unit indicating how many times a search can be conducted in one second. A general search device carries out searching at, for example, 100M (mega) sps, i.e. in the order of 108 times in one second. In such a search operation, the pull down speed of a potential from a match line ML at a high state is a critical factor for high speed operation. The discharge of potential from match line ML can be increased in speed by: (a1) reducing the capacitance of match line ML; and (a2) increasing the drivability of the search transistor that draws out charge.